Welcome to Computer Systems and Architecture
Have you ever wondered what actually happens inside a computer when you tap a screen, open an app, or play a game? At first glance, a modern computer looks almost magical. Beneath the glass and aluminium, however, lies an elegant and logical machine constructed from basic building blocks working in harmony.
This chapter focuses on Theme A: Concepts of computer science, specifically topic A.1 Computer fundamentals. Here, we examine the fundamental architecture of computing systems: how hardware components are structured, how memory is organized, and how the central processing unit executes instructions step by step.
Note on related chapters: How numbers, characters, and media are converted into raw bits is explored in Data representation and number systems, while the software coordinating these components is detailed in Operating systems and system software.
1. The Von Neumann Architecture
In the early days of computing, machines were built to perform only one specific task. If you wanted a machine to do something different, technicians had to physically rewire it! In the 1940s, mathematician and polymath John von Neumann described a revolutionary design that modern computers still follow today: the stored-program concept.
The Stored-Program Concept: Both program instructions and the data being processed are stored together in the same electronic memory space (primary memory) using the same digital format.
This means a computer does not need rewiring to run a new task. If you want to switch from a spreadsheet to a video game, the computer simply loads a different set of instructions into its memory.
Key Components of the Von Neumann Architecture
A Von Neumann system is made up of four essential components:
• The Central Processing Unit (CPU): The "brain" that executes instructions and manipulates data.
• Primary Memory (RAM): The workspace that holds the program code and active data currently in use.
• Input and Output (I/O) Interfaces: Channels that allow the computer to communicate with the outside world (such as keyboards, displays, sensors, and network cards).
• Secondary Storage: Persistent storage (such as hard drives or solid-state drives) to save data when the machine is switched off.
Analogy Corner: The Kitchen Analogy
Think of a computer system like a professional kitchen:
• The CPU is the chef, reading recipe steps and preparing meals.
• Primary Memory (RAM) is the chef's prep counter. Ingredients (data) and recipe cards (instructions) are placed here for instant access.
• Secondary Storage is the pantry or freezer. It holds all the food for long-term keeping, but the chef cannot chop an onion while it is still sitting inside the pantry!
Key Takeaway: The Von Neumann architecture relies on storing both programs and data in primary memory, where the CPU retrieves and executes instructions sequentially.
2. Inside the CPU: Components and Registers
The Central Processing Unit (CPU) is responsible for fetching program instructions, interpreting them, and carrying them out. The CPU contains three major internal sections: the Control Unit (CU), the Arithmetic Logic Unit (ALU), and dedicated high-speed internal storage locations called Registers.
The Control Unit (CU)
The Control Unit acts as the conductor of the orchestra. It does not carry out calculations or store data itself. Instead, it:
• Directs the flow of instructions and data through the CPU.
• Coordinates the timing of all internal operations using periodic clock pulses.
• Decodes each instruction into specific micro-signals that tell other components what to do.
The Arithmetic Logic Unit (ALU)
The Arithmetic Logic Unit is the calculator and decision-maker of the CPU. It performs two basic categories of operations:
• Arithmetic operations: Basic math such as addition, subtraction, multiplication, and division.
• Logical operations: Comparisons and boolean decisions such as testing if two values are equal, or evaluating conditions like A AND NOT B.
CPU Registers: Super-Fast Scratchpads
Registers are extremely small, high-speed memory cells built directly inside the CPU. They hold data values, memory addresses, or instructions that the CPU needs immediately during the execution of an instruction.
Don't worry if these sound technical at first! Each register has one specific, simple job:
• Program Counter (PC): Holds the memory address of the very next instruction waiting to be fetched from RAM. After the instruction is fetched, the PC automatically increments (advances) to point to the following address.
• Memory Address Register (MAR): Holds the memory address that is currently being accessed in primary memory, whether the CPU is reading an instruction/data from that address or writing a result to it.
• Memory Data Register (MDR): Also called the Memory Buffer Register. Holds the actual data or instruction that has just been read from RAM, or data that is waiting to be written to RAM.
• Current Instruction Register (CIR): Holds the binary instruction that has just been fetched while the Control Unit decodes it into control signals.
• Accumulator (ACC): Temporarily holds the immediate results of calculations and logical tests carried out by the ALU.
Memory Aid for Registers:
• PC: "Points to the Current next step"
• MAR: "Address roadmap"
• MDR: "Data courier carrying the actual payload"
• CIR: "Currently In Reading / Decoding"
• ACC: "Accumulates calculation answers"
Key Takeaway: The CU directs traffic, the ALU does the math and logic, and Registers act as rapid temporary storage locations inside the processor itself.
3. System Buses: The Internal Highways
How do the CPU, primary memory, and I/O devices talk to each other? They communicate across a collection of parallel conductive wires called the system bus. The system bus is split into three specialized pathways:
• Address Bus: Carries the physical memory address from the CPU (specifically from the MAR) to primary memory or I/O controllers. The address bus is unidirectional (one-way), meaning addresses travel only from the CPU to memory. The width of the address bus determines the maximum amount of memory the processor can directly address.
• Data Bus: Carries the actual program instructions and numerical/text data between the CPU (specifically the MDR), memory, and peripheral devices. The data bus is bidirectional (two-way), because data must travel into the CPU during read operations and out of the CPU during write operations.
• Control Bus: Carries synchronization signals, status updates, and command instructions (such as Memory Read, Memory Write, Clock Pulses, and Interrupt Requests) generated by the Control Unit. The control bus is bidirectional to allow signals to pass both to and from system components.
Common Mistake to Avoid: Confusing the Address Bus and the Data Bus! The address bus carries the location (like an envelope's street address), while the data bus carries the contents (the actual letter inside the envelope).
Key Takeaway: The address bus carries memory addresses one-way from the CPU, the data bus shuttles data both ways, and the control bus transmits coordination signals across the system.
4. The Machine Instruction Cycle (Fetch-Decode-Execute)
Every single task a computer performs—from calculating \(Delta = b^2 - 4ac\) to rendering high-definition graphics—is broken down into millions of tiny, discrete steps known as the Fetch-Decode-Execute (FDE) cycle (also called the machine instruction cycle). The CPU repeats this sequence continuously while running.
Step 1: The Fetch Phase
The goal of this phase is to retrieve the next instruction from primary memory (RAM) and bring it inside the CPU:
1. The address in the Program Counter (PC) is copied to the Memory Address Register (MAR).
2. The Control Unit (CU) sends a read signal along the Control Bus to primary memory.
3. The address stored in the MAR is sent across the Address Bus to RAM.
4. The contents of that memory location travel back across the Data Bus and are stored in the Memory Data Register (MDR).
5. Simultaneously, the PC is incremented by one so that it points to the subsequent memory address.
6. The instruction inside the MDR is copied into the Current Instruction Register (CIR).
Step 2: The Decode Phase
The goal of this phase is to figure out what the instruction means:
1. The Control Unit inspects the instruction held in the CIR.
2. The instruction is split into its Opcode (the operation code, such as ADD, LOAD, or STORE) and its Operand (the data value or the memory address where the data is located).
3. The CU translates this opcode into internal control signals, preparing the ALU and system buses for the specific task.
Step 3: The Execute Phase
The goal of this phase is to carry out the specified instruction:
• If the instruction involves arithmetic or logic, the ALU performs the calculation and saves the result in the Accumulator (ACC).
• If the instruction requires reading data from RAM, the memory address specified in the operand is loaded into the MAR, and data is fetched via the data bus.
• If the instruction requires writing data, the CPU outputs the result to memory or an output interface.
• If the instruction is a jump or branch command, the PC is updated to a completely new address instead of incrementing sequentially.
Once execution finishes, the cycle starts immediately again with the next instruction!
Quick Review:
• Fetch: RAM \(\rightarrow\) Bus \(\rightarrow\) MDR \(\rightarrow\) CIR (PC points to next address).
• Decode: CU interprets opcode in CIR.
• Execute: Action completed (ALU computes, registers update, or data transfers).
Key Takeaway: The machine instruction cycle is the continuous, rhythmic heartbeat of the CPU, systematically fetching instructions from RAM, decoding their meaning, and executing their commands.
5. Memory and Storage Organization
Computers make use of a memory hierarchy. Components closest to the CPU are exceptionally fast but have limited capacity and higher manufacturing costs. As you move farther from the CPU, storage capacity expands, but access times become slower.
Primary Memory: RAM and ROM
Primary memory refers to memory that the CPU can access directly via the system bus.
1. Random Access Memory (RAM):
• Volatile: RAM loses its entire contents the moment power is switched off.
• Read and Write: The CPU can both read data from and write new data to any RAM location rapidly.
• Function: Holds the operating system modules, active application code, and live user data currently being processed.
2. Read-Only Memory (ROM):
• Non-volatile: ROM permanently retains its stored data even when the computer has no power.
• Read-only: Data is written during manufacturing and cannot be easily modified under normal operating conditions.
• Function: Holds the system's initial startup instructions (such as the bootstrap loader or basic input/output firmware), which initialize hardware and instruct the system to load the main operating system from secondary storage into RAM.
Cache Memory
Even though RAM is fast, modern CPUs operate at speeds far greater than standard RAM chips. If a CPU had to wait for RAM every time it needed data, it would spend most of its time sitting idle. This delay is known as a memory bottleneck.
Cache memory solves this problem. It is an extremely small, exceptionally fast type of volatile memory placed directly on or adjacent to the CPU chip.
• How it works: The cache stores copies of frequently used instructions and data. When the CPU needs data, it checks the fast cache first (a cache hit). If the data is not there (a cache miss), it falls back to the slower RAM.
• Cache levels: Level 1 (L1) cache is the smallest and fastest, sitting inside the processor core itself. Level 2 (L2) and Level 3 (L3) caches are progressively larger and slightly slower, acting as staging areas between L1 and main RAM.
Secondary Storage
Because primary RAM is volatile and limited in capacity, computers need secondary storage to retain programs, files, and operating systems indefinitely.
• Non-volatile: Contents remain intact when the computer is powered down.
• High capacity & low cost: Provides gigabytes or terabytes of storage space economically.
• Not directly accessible by the CPU: Data from secondary storage must always be copied into primary memory (RAM) before the CPU can execute or process it.
Common storage technologies include Solid-State Drives (SSDs) using flash semiconductor memory, Magnetic Hard Disk Drives (HDDs) using magnetized platters, and Optical storage using reflective discs read by lasers.
Key Takeaway: Cache is fastest and closest to the CPU; RAM provides fast, volatile workspace for active programs; ROM safely holds permanent startup code; secondary storage provides large-scale, non-volatile long-term storage.
6. Factors Affecting Processor Performance
Have you ever wondered why two computers with similar looks perform completely differently? CPU performance depends on several interrelated hardware specifications working together:
1. Clock Speed
The CPU contains an internal quartz crystal clock that pulses at a steady frequency to synchronize operations. Every micro-step of the instruction cycle occurs on a clock pulse.
• Clock speed is measured in Hertz (Hz), where \(1\text{ Hz} = 1\text{ cycle per second}\).
• Modern processors are rated in Gigahertz (GHz), where \(1\text{ GHz} = 1 \times 10^9\text{ cycles per second}\). For example, a \(3.2\text{ GHz}\) CPU pulses \(3.2\text{ billion}\) times every second.
• Impact: Higher clock speed generally means instructions execute more rapidly. However, higher clock speeds generate significantly more heat and consume more electrical power.
2. Number of Processor Cores
Historically, a CPU contained a single processing unit. Modern processors are multicore, packing two, four, eight, or more independent CPU cores onto a single chip.
• Impact: Multiple cores enable parallel processing (running different instructions simultaneously) and multitasking (running separate applications across different cores without competing for the same ALU/CU).
• Limitation: Doubling the number of cores does not automatically double system speed! Software must be specifically programmed to divide tasks across multiple cores. If a task is sequential (where step 2 depends strictly on the outcome of step 1), extra cores cannot speed it up.
3. Cache Size
Because accessing the on-chip cache is dramatically faster than reaching out to external RAM, having a larger cache allows the CPU to store more instructions and data close at hand.
• Impact: A larger cache yields higher cache hit rates, meaning the CPU spends fewer clock cycles waiting for data to travel across the external data bus from RAM.
Key Takeaway: CPU throughput is determined by a balance of clock speed (cycles per second), core count (parallel execution capacity), and cache size (reducing data retrieval latency).
Chapter Review & Self-Check Questions
Test your understanding of computer systems and architecture with these quick review questions:
1. Explain the primary difference between the stored-program concept and earlier computing machines.
2. Identify which CPU register holds the address of the next instruction waiting to be fetched.
3. Distinguish between the Address Bus and the Data Bus in terms of directionality and content carried.
4. Describe what occurs during the Decode phase of the machine instruction cycle.
5. Explain why computers require both primary memory (RAM) and secondary storage.