Welcome to Digital Memory: The NOR Gate S-R Latch

Ever wondered how a computer remembers that you pressed a key even after you let go? That's the power of memory! In this chapter, we are going to explore the Set-Reset (S-R) Latch built using NOR gates. This is the simplest "brain cell" of a digital circuit.

Don't worry if this seems a bit abstract at first. We will break it down step-by-step, and soon you'll see how these gates "hold on" to information!


1. What is an S-R Latch?

In our previous chapters, we looked at combinational logic where the output depends only on the current inputs. An S-R Latch is different. It is a sequential circuit, which means it can "remember" what happened in the past.

Quick Review: Remember the NOR gate? Its output is 1 (High) only when both inputs are 0 (Low). If any input is 1, the output is 0. We will use two of these to build our latch.

Key Terms:

  • S (Set): To make the output "1".
  • R (Reset): To clear the output to "0".
  • Q: The main output of the latch.
  • \(\bar{Q}\) (Not-Q): The opposite of the main output.

Analogy: Think of an S-R latch like a light switch in a hallway. Once you flip it "UP" (Set), it stays there even after you take your hand away. To change it, you must physically flip it "DOWN" (Reset).

Section Takeaway: The S-R latch is a digital circuit with memory that stores one "bit" of data (either a 1 or a 0).

2. The Circuit: Cross-Coupled NOR Gates

To make a circuit remember, we use feedback. This means the output of one gate is fed back into the input of the other. This creates a loop that "latches" the state in place.

How to Draw it:

  1. Draw two NOR gates one above the other.
  2. The top gate has the R (Reset) input. Its output is Q.
  3. The bottom gate has the S (Set) input. Its output is \(\bar{Q}\).
  4. The Magic Loop: Connect the output Q to one of the inputs of the bottom gate. Connect the output \(\bar{Q}\) to one of the inputs of the top gate.

Did you know? This "cross-coupling" is what allows the gates to hold their state even when the inputs are removed!


3. The Truth Table: The Rules of the Latch

Let's look at how the inputs S and R affect the output Q. This is the most important part to memorize for your exams!

1. The Hold State (S=0, R=0):
The latch stays exactly as it was. If Q was 1, it stays 1. If Q was 0, it stays 0. It "remembers."

2. The Reset State (S=0, R=1):
The output Q becomes 0. (Remember: Reset makes it 0).

3. The Set State (S=1, R=0):
The output Q becomes 1. (Remember: Set makes it 1).

4. The Forbidden State (S=1, R=1):
This is a big NO-NO. If you try to Set and Reset at the same time, both outputs Q and \(\bar{Q}\) try to become 0. This is logically inconsistent because \(\bar{Q}\) should always be the opposite of Q. Avoid this state!

Summary Table for NOR S-R Latch:

\(S=0, R=0 \rightarrow\) Hold (No change)
\(S=0, R=1 \rightarrow\) Q = 0 (Reset)
\(S=1, R=0 \rightarrow\) Q = 1 (Set)
\(S=1, R=1 \rightarrow\) Invalid (Not allowed)

Quick Review Box: S=1 "Sets" Q to 1. R=1 "Resets" Q to 0. Both 0 means "Hold." Both 1 is "Invalid."

4. Timing Diagrams

A timing diagram shows how the logic states change over a period of time. When you see one in an exam, follow these steps:

  1. Look at the S and R pulses.
  2. When S goes high (1) and R is low (0), draw Q going up to 1.
  3. When S and R both go low (0), keep Q exactly where it was (Hold).
  4. When R goes high (1) and S is low (0), draw Q going down to 0.

Common Mistake: Students often forget that Q stays high even *after* the S pulse has finished. That's the whole point of a latch—it remembers the pulse!


5. Real-World Applications

A. Momentary to Constant Output

Imagine a burglar alarm. A sensor might only trip for a split second (a momentary occurrence). You don't want the siren to turn off the moment the burglar steps away! An S-R Latch takes that quick pulse (Set) and turns it into a constant output that keeps the siren blaring until a high-security key (Reset) is used.

B. The Debounced Switch

When you press a physical button, the metal contacts actually "bounce" against each other several times in a few milliseconds. A computer is so fast it might think you pressed the button 10 times!

By using an S-R Latch, the very first "bounce" Sets the latch, and all the following bounces are ignored because the latch is already in the Set state. This gives us a clean, single signal. This is called a debounced switch.

Section Takeaway: S-R latches are essential for turning messy, temporary signals into clean, permanent data.

Final Summary Checklist

- Can you draw the NOR gate S-R latch circuit? (Cross-coupled gates)
- Do you know the Truth Table by heart? (S=1 is Set, R=1 is Reset)
- Can you identify the "Hold" and "Invalid" states?
- Can you explain why we need "debouncing"? (To stop switch "bouncing" from creating multiple signals)

Great job! You've just mastered the fundamentals of digital memory. Keep practicing those timing diagrams!