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Paging is a physical division of memory into equal, fixed-sized blocks (pages). Segmentation is a logical division of memory into variable-sized blocks (segments) that reflect the logical structure of the program (such as functions, objects, or subroutines).

1 mark for identifying that pages are fixed/physical size and segments are variable/logical size. 1.1 marks for clear contrast between physical memory structure in paging and logical memory structure in segmentation.

Convert 12 to 8-bit binary: 00001100. Convert 18 to 8-bit binary: 00010010. Represent -18 in two's complement by flipping the bits of 18 (11101101) and adding 1 to get 11101110. Add 12 and -18: 00001100 + 11101110 = 11111010. Verification: 11111010 in two's complement is -128 + 64 + 32 + 16 + 8 + 2 = -6, which matches 12 - 18 = -6.

1 mark for converting -18 to its correct two's complement representation of 11101110. 1.1 marks for completing the binary addition correctly to arrive at the final binary value of 11111010.

First, distribute the second term: \( A \cdot (B + C) = A \cdot B + A \cdot C \). The expression becomes: \( A \cdot B + A \cdot B + A \cdot C \). Using the Idempotent law where \( X + X = X \), the terms \( A \cdot B + A \cdot B \) simplify to \( A \cdot B \). The final simplified expression is \( A \cdot B + A \cdot C \), which can also be written as \( A \cdot (B + C) \).

1 mark for expanding the expression correctly to \( A \cdot B + A \cdot B + A \cdot C \). 1.1 marks for applying the idempotent law to obtain the final simplified expression \( A \cdot B + A \cdot C \) or \( A \cdot (B + C) \).

During a write operation, the processor determines the destination memory address and loads it into the MAR. Simultaneously, the data to be written is placed in the MDR. The control unit then asserts the write signal, causing the data stored in the MDR to be written into the physical memory location specified by the MAR.

1 mark for stating that MAR holds the memory address to be written to. 1.1 marks for explaining that the MDR holds the actual data that is written to the address specified by the MAR.

Agile methodologies are iterative, delivering working software in short cycles or sprints, which allows the client to provide frequent feedback and update requirements dynamically. In contrast, the Waterfall model is highly structured and sequential, meaning changing requirements after the analysis phase is complete is very expensive and difficult to integrate.

1 mark for explaining that Agile uses iterative sprints with frequent user reviews to incorporate changes. 1.1 marks for contrasting this with the rigid sequence of Waterfall, where changing requirements late in development causes massive rework and delays.

A router extracts the destination IP address from the header of an incoming packet. It compares this address with its routing table to determine the optimal next path (hop) to forward the packet. If a packet is lost in transit, the receiving device identifies a gap in the packet sequence numbers and requests a retransmission from the sender using transport layer protocols (like TCP).

1 mark for explaining that the router extracts the destination IP address and uses its routing table to forward the packet. 1.1 marks for describing how packet loss is managed (detecting missing sequence numbers and requesting retransmission).

An assembler is a low-level translator that converts assembly language (using mnemonics) directly into machine code, typically with a one-to-one mapping between assembly statements and machine instructions. A compiler is a high-level translator that translates high-level programming code (such as Java or C++) into machine code or bytecode, where a single high-level statement typically translates into multiple machine instructions (a one-to-many mapping).

1 mark for distinguishing the source languages (assembly/mnemonics for assemblers vs high-level languages for compilers). 1.1 marks for identifying the translation ratio (one-to-one mapping for assemblers vs one-to-many mapping for compilers).

Magnetic hard disks consist of spinning platters coated with a magnetic material. A read/write head hovers over the platters, detecting changes in electromagnetic polarity which correspond to binary 1s and 0s. Optical discs (such as CDs or DVDs) store data physically as microscopic pits and lands on a spiral track. A laser beam is focused on the track, and a photodetector measures the amount of reflected light (transitions between pits and lands disrupt reflection) to determine the binary values.

1 mark for explaining that magnetic reading involves detecting magnetic polarity/field changes on a spinning platter using a read/write head. 1.1 marks for explaining that optical reading involves shining a laser beam and measuring light reflection off physical pits and lands on the disc's surface.

At the start of the Fetch-Decode-Execute cycle, the Program Counter (PC) holds the address of the next instruction to be fetched from memory. This memory address is copied or transferred from the PC into the Memory Address Register (MAR) via the internal bus, preparing the system to retrieve the instruction from that physical location in RAM.

1 Mark: Identifying that the Program Counter (PC) holds or stores the address of the next instruction to be fetched. 1 Mark: Stating that this address is copied or transferred to the Memory Address Register (MAR).

To subtract \(00010101_{2}\) (+21) from \(01001100_{2}\) (+76), we can add the two's complement representation of the second number. First, find the two's complement of \(00010101_{2}\): 1. Invert the bits to get \(11101010\). 2. Add 1 to get \(11101011\) (which represents -21). Now, add the first number and this two's complement value: \(01001100 + 11101011 = 100110111\). Discarding the overflow/carry out of the 8th bit yields \(00110111\) (which is +55 in denary).

1 Mark: Correctly converting \(00010101\) to its two's complement negative representation, which is \(11101011\) (or showing an equivalent correct subtraction method). 1 Mark: Correct 8-bit binary result: \(00110111\).

Apply De Morgan's Law to the first term: \(\neg(A \lor B) = \neg A \land \neg B\). Substitute this back into the expression to get \((\neg A \land \neg B) \lor (\neg A \land B)\). Apply the distributive law by factoring out \(\neg A\) to get \(\neg A \land (\neg B \lor B)\). Since \(\neg B \lor B = 1\) (identity law), this simplifies to \(\neg A \land 1 = \neg A\).

1 Mark: Applying De Morgan's Law correctly to obtain \(\neg A \land \neg B\). 1 Mark: Correctly factoring or simplifying the expression to reach the final simplified answer of \(\neg A\) (accept NOT A).

Round Robin scheduling allocates each ready process an equal, small, fixed unit of CPU time (known as a time slice or quantum). The processor runs a process until either its time slice expires or it blocks, at which point the process is moved to the back of the ready queue and the next process is loaded. However, if the time slice is very short, the constant switching of process states (context switching) introduces a large performance overhead.

1 Mark: Explaining that processes are allocated a cyclic or sequential, equal, fixed interval of processor time (time slice or quantum). 1 Mark: Stating a valid disadvantage, such as high context-switching overhead, or lack of prioritization meaning short or urgent tasks must wait for longer ones.

When a user inputs a human-readable URL, the browser queries the DNS server. The DNS acts like an address book, looking up the corresponding numerical IP address (such as IPv4 or IPv6) associated with that domain. Once the IP address is found and returned, the web browser can send packets and establish a connection directly to the hosting web server.

1 Mark: Stating that the DNS translates or resolves human-readable domain names into numerical IP addresses. 1 Mark: Explaining that this allows the client browser to address and successfully connect to the target web server.

During development, code is constantly changed and tested. First, using an interpreter avoids the time-consuming step of re-compiling the entire source code file; code runs immediately. Second, when a run-time error occurs, the interpreter stops execution at the exact line of failure and reports it, making it much quicker to pinpoint and fix program bugs.

1 Mark: Faster testing cycle because changes to source code can be run immediately without waiting for a compilation phase. 1 Mark: Easier debugging because the interpreter stops and identifies the precise instruction where an error occurs during execution.

The Computer Misuse Act 1990 outlines several computer crimes. Three main categories include: (1) Unauthorized access to computer material (simple hacking). (2) Unauthorized access with intent to commit or facilitate commission of further offences. (3) Unauthorized acts with intent to impair, or prevent or hinder access to, computer operations (such as making modifications, launching DDoS, or installing malware).

Award 1 mark per distinct offence identified (up to 2 marks): - Unauthorized access to computer material / basic hacking. - Unauthorized access with intent to commit or facilitate further offences. - Unauthorized modification of computer material (such as altering or deleting data, or spreading malware). - Unauthorized acts with intent to impair computer operations or networks (e.g., DDoS attacks).

Rendering 3D graphics requires performing identical, independent mathematical calculations (like vector transformations or pixel shading) on vast datasets simultaneously. A GPU is designed with thousands of smaller, simpler cores optimized for parallel processing (SIMD - Single Instruction, Multiple Data). A CPU, by contrast, has a few highly powerful cores built for sequential processing, which is far less efficient for highly repetitive parallel graphical tasks.

1 Mark: Stating that GPUs feature a highly parallel architecture containing thousands of smaller, simpler cores (whereas CPUs have fewer, sequential-optimized cores). 1 Mark: Explaining that graphic rendering involves performing repetitive, independent operations (e.g. pixel calculations) simultaneously, which aligns perfectly with parallel execution.

1. Express the positive version of the number (43) in 8-bit binary:
\(43 = 32 + 8 + 2 + 1\), which is \(00101011_2\).

2. Invert all the bits (one's complement):
\(00101011 \rightarrow 11010100_2\).

3. Add 1 to the result (two's complement):
\(11010100 + 1 = 11010101_2\).

Verification: \(-128 + 64 + 16 + 4 + 1 = -43\).

1 mark for showing correct binary representation of \(+43\) (\(00101011\)) or indicating correct process of inverting bits.
1 mark for correct final binary answer: \(11010101\).

1. Distribute \(A\) over the parenthesis:
\(A \cdot (\bar{A} + B) = (A \cdot \bar{A}) + (A \cdot B)\)

2. Apply the complement law where \(A \cdot \bar{A} = 0\):
\(0 + (A \cdot B)\)

3. Apply the identity law to get the final simplified expression:
\(A \cdot B\) (or simply \(AB\))

1 mark for expanding the brackets correctly using the distributive law: \(A \cdot \bar{A} + A \cdot B\).
1 mark for simplifying to the final correct expression: \(A \cdot B\) (or \(AB\)).

A device driver is software that acts as an interface or translator between the operating system and a specific physical hardware device. It allows the operating system to communicate with the hardware without needing to know the specific technical implementation details of every individual peripheral device.

1 mark for stating that it acts as an interface/translator/bridge between the operating system and the hardware peripheral.
1 mark for explaining that it translates generic OS commands into device-specific instructions (or allows hardware to function without OS knowing its internal design).

DNS servers translate human-readable domain names (such as www.example.com) into numerical IP addresses needed by computers to locate resources. This provides benefits such as user convenience (not needing to memorize numbers) and flexibility (IP addresses can change dynamically behind the scenes without changing the public-facing URL).

1 mark per valid benefit listed (maximum of 2):
- Users do not need to memorize numeric IP addresses / can use human-readable URLs.
- If a website changes its server/IP, the domain name remains the same (only DNS database updates).
- DNS lookups can be cached locally/internally to speed up subsequent connections.

During the Fetch stage of the cycle, the address stored in the Program Counter (PC) is copied to the Memory Address Register (MAR). The PC is then immediately incremented (by 1) to point to the memory location of the next consecutive instruction to be processed.

1 mark for stating that it holds the memory address of the next instruction to be fetched.
1 mark for stating that it increments (by 1) automatically once the current address is copied/fetched.

1. At the end of the current Fetch-Decode-Execute cycle, the CPU checks the interrupt register. 2. If an interrupt is detected and has higher priority, the CPU saves its current state. The contents of the Program Counter (PC) and other registers are pushed onto the system stack. 3. The Program Counter is updated with the memory address of the Interrupt Service Routine (ISR) associated with that interrupt. 4. The ISR is executed. 5. Once finished, the original register values are popped off the stack and restored, and the PC resumes executing the interrupted program.

1 mark: Completing the current Fetch-Decode-Execute cycle before processing the interrupt. 1 mark: Saving the current register values (PC, ACC, etc.) onto the stack. 1 mark: Loading the address of the ISR into the Program Counter. 1 mark: Popping the saved register states from the stack to resume the original process. 0.5 marks: Identifying that the CPU checks interrupt priority or uses an interrupt register.

Step 1: Apply De Morgan's Law to the first term: \(\overline{A \cdot B} = \overline{A} + \overline{B}\). The expression becomes: \((\overline{A} + \overline{B}) \cdot (A + B)\). Step 2: Expand/Distribute the brackets: \(\overline{A}\cdot A + \overline{A}\cdot B + \overline{B}\cdot A + \overline{B}\cdot B\). Step 3: Apply the Complement Law: Since \(\overline{X}\cdot X = 0\), then \(\overline{A}\cdot A = 0\) and \(\overline{B}\cdot B = 0\). The expression simplifies to: \(0 + \overline{A}\cdot B + A\cdot\overline{B} + 0\). Step 4: Apply the Identity Law: \(\overline{A}\cdot B + A\cdot\overline{B}\). This is equivalent to the XOR operation: \(A \oplus B\).

1 mark: Correctly applying De Morgan's Law to get \((\overline{A} + \overline{B}) \cdot (A + B)\). 1 mark: Correct expansion to \(\overline{A}\cdot A + \overline{A}\cdot B + \overline{B}\cdot A + \overline{B}\cdot B\). 1 mark: Correctly applying the Complement Law to simplify term elements to 0. 1 mark: Reaching the simplified form \(\overline{A}\cdot B + A\cdot\overline{B}\). 0.5 marks: Stating the equivalent XOR form \(A \oplus B\).

During the fetch stage: 1. The Program Counter (PC) stores the address of the next instruction. 2. This address is copied from the PC to the Memory Address Register (MAR). 3. The PC is incremented so that it points to the memory location of the next instruction in sequence. 4. The MAR now contains the memory address of the instruction currently being retrieved. 5. A read signal is issued, and the instruction at the address specified by the MAR is loaded into the Memory Data Register (MDR).

1 mark: Stating that the PC holds the address of the next instruction to be fetched. 1 mark: Stating that the address in the PC is copied to the MAR. 1 mark: Stating that the PC is incremented to prepare for the subsequent cycle. 1 mark: Explaining that the MAR holds the address while the main memory is accessed to retrieve the instruction. 0.5 marks: Mentioning the transfer of the retrieved instruction to the MDR.

A standard loop is used to iterate through the array. An accumulator variable is initialized to zero and incremented each time an element in the array matches the target. After checking all elements, the function returns the accumulator.

```
function countOccurrences(arr, target)
count = 0
for i = 0 to arr.length - 1
if arr[i] == target then
count = count + 1
endif
next i
return count
endfunction
```

1 mark: Declaring the function with appropriate parameters and a return statement. 1 mark: Initializing a count/accumulator variable to 0. 1 mark: Writing a loop that correctly iterates from the first element to the last element of the array. 1 mark: Using an IF statement to check if the current array element equals the target and incrementing the count. 0.5 marks: Using correct, consistent pseudocode syntax throughout.

### RISC Characteristics:
- **Instructions**: Uses a simple, small instruction set. Each instruction is of a fixed length and typically takes a single clock cycle to execute.
- **Pipelining**: Highly efficient due to uniform instruction execution times, allowing multiple instructions to be processed simultaneously in different stages.
- **Hardware**: Simple hardware design means fewer transistors are required. This results in smaller chip sizes, lower manufacturing costs, and significantly lower power consumption and heat output.
- **Software/Compilers**: Requires more complex compilers to break high-level language statements down into a larger number of simple assembly instructions. Programs require more memory (RAM) because code size is larger.

### CISC Characteristics:
- **Instructions**: Uses a broad, complex instruction set. Single instructions can perform complex tasks (e.g., loading from memory, performing an arithmetic operation, and storing back to memory all in one instruction) and take multiple clock cycles.
- **Pipelining**: Difficult to pipeline effectively due to the variable length and varying clock cycles of instructions.
- **Hardware**: Highly complex hardware with many transistors, which requires more silicon space, generates more heat, and consumes significant electrical power.
- **Software/Compilers**: Compilers are simpler because high-level instructions translate more directly into single, complex machine instructions. Programs require less memory (RAM) because code size is compact.

### Suitability Analysis:
- **Smart Tracker**: **RISC is highly suitable.** Its low power consumption is critical for maximizing battery life in a small, wearable device. The lower heat generation means the device will not overheat against the user's skin. The simpler hardware allows for a smaller physical form factor. The limited memory requirements of a tracker can easily accommodate the slightly larger code footprint of RISC.
- **Desktop Workstation**: **CISC is highly suitable.** 3D rendering requires massive, complex mathematical computations. CISC architectures have complex, specialized hardware instructions (like floating-point arithmetic and vector processing instructions) built directly into the silicon, which can execute these tasks very efficiently. Since the workstation is mains-powered, the high power consumption and heat generation of CISC are not limiting factors, as active cooling (fans/liquid cooling) can be used.

### Level 3 (7-9 Marks)
- Detailed and balanced evaluation of both RISC and CISC architectures.
- Clear, justified recommendations for both devices (RISC for the smart tracker, CISC for the workstation).
- Accurate coverage of power consumption, hardware design, instruction execution, and compiler implications.
- Information is organized logically with precise technical terminology used throughout.

### Level 2 (4-6 Marks)
- Reasonable description of RISC and CISC characteristics with some comparison.
- Recommendations are made for both devices, but some justifications may lack depth (e.g., only mentioning power but omitting compiler/pipelining aspects).
- The writing is structured, though some technical explanations may be slightly unclear or incomplete.

### Level 1 (1-3 Marks)
- Basic definitions of RISC and/or CISC are provided.
- Identification of which processor fits which device is correct, but with little to no technical justification.
- The answer lacks structure and contains major gaps in technical knowledge.

### Indicative Content:
- RISC: simple instructions, 1 cycle execution, pipelined, low power, simple hardware, complex compiler, larger code size.
- CISC: complex instructions, variable cycles, hard to pipeline, high power, complex hardware, simple compiler, smaller code size.
- Smart tracker needs RISC due to battery/thermal/space constraints.
- Desktop workstation needs CISC because mains-powered permits high power draw, and complex rendering operations benefit from specialized hardware execution units.

### Paging:
- **Concept**: Paging splits physical memory and active programs into fixed-size blocks.
- **Mechanism**: Physical memory is split into "page frames" and logical memory into "pages" of equal size (typically 4 KB). A structure called a "page table" maps the logical pages of a process to the physical frames in RAM. Pages do not need to be stored contiguously in physical RAM.

### Segmentation:
- **Concept**: Segmentation splits programs into variable-sized, logically cohesive blocks based on the structure of the program code.
- **Mechanism**: Segments correspond to logical components such as functions, objects, subroutines, or stack/heap structures. A "segment table" is used to track the starting physical address and the length (limit) of each segment.

### Virtual Memory:
- Both techniques support the implementation of virtual memory.
- When physical RAM is full, pages or segments that are not currently in active use can be written ("swapped out") to a designated area of secondary storage (such as a hard drive or SSD).
- If the CPU requires a page or segment that is in virtual memory, a "page fault" (or segment fault) occurs, causing the operating system to swap a currently unused page/segment out of RAM to make room to swap the required one back in.
- Excessive swapping of pages/segments can lead to "disk thrashing," which severely degrades system performance.

### Similarities:
- Both allow programs to run even if they are larger than the physical RAM available.
- Both split programs into smaller parts that can be stored non-contiguously in physical memory.
- Both use lookup tables (page table vs. segment table) managed by the MMU (Memory Management Unit) to map logical program addresses to physical memory addresses.

### Differences:
- **Size**: Pages are of a fixed, uniform size determined by hardware/OS, whereas segments are of variable, arbitrary sizes determined by the logical structure of the program.
- **Division Principle**: Paging is a physical division of memory, while segmentation is a logical division.
- **Fragmentation**: Paging is susceptible to **internal fragmentation** (where the final page of a process is not fully filled, leaving wasted space inside the page frame). Segmentation is susceptible to **external fragmentation** (where free space is broken up into small, non-contiguous gaps between segments, making it impossible to allocate a new segment even if total free space is sufficient).

### Level 3 (7-9 Marks)
- Accurate, comprehensive descriptions of both paging (fixed physical partitions) and segmentation (variable logical partitions).
- Clear, detailed explanation of virtual memory, including swapping, page faults, and disk thrashing.
- Compares both techniques effectively, explicitly identifying similarities (non-contiguous execution, virtual memory) and differences (fixed vs. variable size, internal vs. external fragmentation).
- Structured, logical presentation using precise technical terminology.

### Level 2 (4-6 Marks)
- Describes both paging and segmentation with minor omissions.
- Explains virtual memory basics (swapping to secondary storage) but may not fully explain page faults or thrashing.
- Includes some valid points of comparison, though the distinction between internal and external fragmentation may be vague.
- Writing is mostly structured with reasonable use of technical terms.

### Level 1 (1-3 Marks)
- Basic definitions of paging and/or segmentation are provided.
- Explains virtual memory in simple terms but misses technical implementation details.
- Minimal or no comparative analysis.
- Information may be fragmented or lack clear structure.

### Indicative Content:
- Paging: physical, fixed-size blocks (pages and frames), page table mapping, non-contiguous.
- Segmentation: logical, variable-size blocks (based on functions/modules), segment table mapping.
- Virtual Memory: extends RAM using secondary storage, swapping pages/segments, page faults, thrashing if overused.
- Similarities: both use tables, both allow non-contiguous storage, both enable virtual memory.
- Differences: physical vs logical, fixed vs variable size, internal fragmentation (paging) vs external fragmentation (segmentation).

Let us trace the calls step by step: mystery(1) returns 1. mystery(2) returns 2 * mystery(1) + 1 = 2 * 1 + 1 = 3. mystery(3) returns 3 * mystery(2) + 1 = 3 * 3 + 1 = 10. mystery(4) returns 4 * mystery(3) + 1 = 4 * 10 + 1 = 41.

1 mark for tracing recursive calls correctly up to mystery(3) (evaluating to 10). 0.83 marks for correctly calculating the final answer of 41.

A binary search works by repeatedly dividing the search space in half based on whether the target value is larger or smaller than the midpoint element. This logic fails completely unless the array elements are sorted in ascending (or descending) order.

1.83 marks for stating that the array must be sorted (either ascending or descending).

Using the distributive law: \(A \cdot (A + B) = (A \cdot A) + (A \cdot B)\). Since \(A \cdot A = A\) (Idempotent law), this becomes \(A + (A \cdot B)\). Using the absorption law, \(A + (A \cdot B) = A\). Alternatively, this is directly simplified to A by the Absorption Law.

1 mark for identifying the correct application of a Boolean law (such as the absorption law). 0.83 marks for the final correct simplification of A.

In a circular queue implemented in a fixed-size array of size N, the rear pointer is updated using modulo arithmetic: rear = (rear + 1) mod N. Here, N = 5, and the current rear is 4. New rear = (4 + 1) mod 5 = 5 mod 5 = 0.

1 mark for recognizing that the rear pointer wraps around to the beginning of the array. 0.83 marks for the correct final integer answer of 0.

The parameter x is passed 'byRef' (by reference). This means a reference to the actual memory address of num is passed to the procedure. Any changes made to x within the procedure directly affect num. Therefore, num becomes 5 + 10 = 15.

1 mark for explaining that passing by reference modifies the original variable. 0.83 marks for the correct value of 15.

The expression requires 'moisture level below 30%' (which is represented directly by M) and 'not currently raining' (which is the negation of R, represented by NOT R). Joining these with an AND operator yields M AND NOT R.

1 mark for representing 'not currently raining' as NOT R (or equivalents like ~R, R'). 0.83 marks for combining both variables with AND to get the complete correct expression.

Start with [5, 1, 4, 2]. Compare 5 and 1: swap because 5 > 1 -> [1, 5, 4, 2]. Compare 5 and 4: swap because 5 > 4 -> [1, 4, 5, 2]. Compare 5 and 2: swap because 5 > 2 -> [1, 4, 2, 5]. The first pass is now complete, placing the largest value 5 in its correct final position at the end.

1 mark for showing correct intermediate steps or recognizing 5 bubbles to the end. 0.83 marks for the correct final array state: [1, 4, 2, 5].

Abstraction is the process of hiding irrelevant complexity and detail to focus on key features. A transit map abstracts away complex geographic details (exact track paths, above-ground landmarks, exact distances) and highlights only what the user needs: the order of stations and where lines intersect.

1 mark for identifying what is removed/ignored (e.g., actual geography, scale, physical topography). 0.83 marks for identifying what is kept/focused on (e.g., order of stations, connectivity, interchange points).

Tracing calls: 1. mystery(5, 11) returns 5 + mystery(10, 5). 2. mystery(10, 5) returns 10 + mystery(20, 2). 3. mystery(20, 2) returns mystery(40, 1). 4. mystery(40, 1) returns 40 + mystery(80, 0). 5. mystery(80, 0) returns 0. Back-substituting: mystery(40, 1) = 40 + 0 = 40; mystery(20, 2) = 40; mystery(10, 5) = 10 + 40 = 50; mystery(5, 11) = 5 + 50 = 55.

1 mark: Correct trace of intermediate recursive steps showing argument modification. 0.83 marks: Correct final return value of 55.

Initial: [22, 15, 36, 6, 10]. Iteration 1 (insert 15): [15, 22, 36, 6, 10]. Iteration 2 (insert 36): [15, 22, 36, 6, 10]. Iteration 3 (insert 6): [6, 15, 22, 36, 10].

1 mark: Correctly demonstrating insertion steps up to iteration 2. 0.83 marks: Correct final array after iteration 3: [6, 15, 22, 36, 10].

Preconditions establish clear requirements for module execution, reducing the need for redundant error-checking code within the module and ensuring that unexpected runtime errors are avoided. A key precondition for a square root module is that the input value must be a non-negative number (\(x \ge 0\)).

1 mark: Explanation of importance (e.g., reduces complexity, clear interface contract, prevents errors). 0.83 marks: Identification of a valid precondition (e.g., input >= 0).

1. Enqueue('A'): Q[0]='A', tail=1. 2. Enqueue('B'): Q[1]='B', tail=2. 3. Dequeue(): 'A' is removed, head=1. 4. Enqueue('C'): Q[2]='C', tail=3. 5. Enqueue('D'): Q[3]='D', tail=4. 6. Dequeue(): 'B' is removed, head=2. The elements left are 'C' and 'D' at indices 2 and 3.

1 mark: Correct head and tail pointer values (head=2, tail=4). 0.83 marks: Correct list of remaining elements (['C', 'D']).

Passing by value creates a local copy of the parameter in memory; changes to the variable inside the subroutine do not affect the original variable. Passing by reference passes a pointer or memory address of the original variable; any changes made inside the subroutine directly update the original variable in the calling program.

1 mark: Correct explanation of pass by value (copy created, original unchanged). 0.83 marks: Correct explanation of pass by reference (address passed, original modified).

For year = 1900: 1900 % 400 != 0, but 1900 % 100 == 0, triggering the second branch and returning false. For year = 2024: 2024 % 400 != 0, 2024 % 100 != 0, but 2024 % 4 == 0, triggering the third branch and returning true.

1 mark: Correct output for 1900 (false) with logic explanation. 0.83 marks: Correct output for 2024 (true).

1. Breakpoints: allow the programmer to pause program execution at a specific line of code to inspect the current state. 2. Variable Watch/Inspect: allows real-time tracking of variable values during execution.

1 mark: Identifying breakpoints and describing how they pause execution. 0.83 marks: Identifying variable watch/inspect and describing how it tracks state changes.

Alpha testing is conducted in-house by the internal development team or dedicated internal QA testers in a controlled environment. Its purpose is to find major bugs and critical errors before releasing it outside. Beta testing is conducted by a selected group of external end-users in their own real-world environment. Its purpose is to check usability, gather real-world user feedback, and find edge-case bugs under realistic conditions.

1 mark: Accurate comparison of who conducts the tests (Alpha = internal, Beta = external). 0.83 marks: Accurate comparison of testing environment/purpose (Alpha = controlled/in-house, Beta = real-world).

Let's trace the execution of `process(3845)` step-by-step:

1. Initial states: `n = 3845`, `x = 0`.
2. **First iteration of the while loop**:
- `n > 0` (3845 > 0) is True.
- `y = 3845 MOD 10 = 5`.
- `5 MOD 2 == 1` is True, so `x = x + y` becomes `x = 0 + 5 = 5`.
- `n = 3845 DIV 10 = 384`.
3. **Second iteration**:
- `n > 0` (384 > 0) is True.
- `y = 384 MOD 10 = 4`.
- `4 MOD 2 == 1` is False, so `x` remains 5.
- `n = 384 DIV 10 = 38`.
4. **Third iteration**:
- `n > 0` (38 > 0) is True.
- `y = 38 MOD 10 = 8`.
- `8 MOD 2 == 1` is False, so `x` remains 5.
- `n = 38 DIV 10 = 3`.
5. **Fourth iteration**:
- `n > 0` (3 > 0) is True.
- `y = 3 MOD 10 = 3`.
- `3 MOD 2 == 1` is True, so `x = x + y` becomes `x = 5 + 3 = 8`.
- `n = 3 DIV 10 = 0`.
6. **Loop termination**:
- `n > 0` (0 > 0) is False. The loop terminates.
7. The function returns `x` which is `8`.

- 1.00 Mark: Evidence of intermediate dry-run tracking (e.g., extracting digits 5, 4, 8, 3, or summing odd digits 5 and 3).
- 0.83 Mark: Correct final value of 8.

We can trace the recursive calls of `calc(14, 4)` step-by-step:

1. `calc(14, 4)`:
- Since \( 14 < 4 \) is False, it returns `14 + calc(14 - 4, 4)`, which is `14 + calc(10, 4)`.
2. `calc(10, 4)`:
- Since \( 10 < 4 \) is False, it returns `10 + calc(10 - 4, 4)`, which is `10 + calc(6, 4)`.
3. `calc(6, 4)`:
- Since \( 6 < 4 \) is False, it returns `6 + calc(6 - 4, 4)`, which is `6 + calc(2, 4)`.
4. `calc(2, 4)`:
- Since \( 2 < 4 \) is True (base case), it returns `2`.

Now we substitute the values back up the call stack:
- `calc(6, 4)` returns \( 6 + 2 = 8 \)
- `calc(10, 4)` returns \( 10 + 8 = 18 \)
- `calc(14, 4)` returns \( 14 + 18 = 32 \)

- 1.00 Mark: Clear evidence of tracing the recursion depth (showing recursive steps or substitutions: \( 14 + 10 + 6 + 2 \)).
- 0.83 Mark: Correct final answer of 32.

The function first checks the length of the input password. If it is less than 8 characters, it immediately returns False. Otherwise, it initializes flags for detecting uppercase letters and digits to False. It then loops through each character of the password. If a character is between 'A' and 'Z', the uppercase flag is set to True. If it is between '0' and '9', the digit flag is set to True. Finally, if both flags are True, the function returns True; otherwise, it returns False.

1 mark: Correct function header and footer with parameter password.
1 mark: Correct validation of length >= 8.
1 mark: Loop through every character of the string without out-of-bounds errors.
1 mark: Checking character values correctly for upper case [A-Z] and setting flag.
1 mark: Checking character values correctly for numeric digit [0-9] and setting flag.
0.6 marks: Correctly returning True only if both conditions are met, else returning False.

A binary search works by repeatedly dividing the search interval in half. It begins by defining low and high boundary pointers. In each iteration, it finds the midpoint. If the target matches the midpoint element, its index is returned. If the target is greater, the low boundary shifts to mid + 1. If it is smaller, the high boundary shifts to mid - 1. If low exceeds high, the target does not exist in the array, and the function returns -1.

1 mark: Correct initialization of low and high pointers.
1 mark: Correct loop condition (while low <= high or equivalent).
1 mark: Midpoint calculation using integer division (DIV or equivalent).
1 mark: Correct comparisons with arr[mid] and updating pointers appropriately.
1 mark: Correctly returning the index mid when found.
0.6 marks: Correctly returning -1 if the element is not found.

First, the procedure checks if the queue is full by comparing the 'size' variable with the max capacity (8). If size is equal to 8, a 'Queue Overflow' error is printed. If not, the 'item' is inserted into 'queueArray' at the current 'tail' index. The 'tail' pointer is then advanced to the next position using modular division '(tail + 1) MOD 8' to allow wrapping around. Finally, 'size' is incremented by 1.

1 mark: Correctly checks for overflow condition (size == 8).
1 mark: Prints standard error message "Queue Overflow" when full.
1 mark: Correctly assigns item to queueArray[tail].
1 mark: Updates tail pointer correctly using MOD 8 operation.
1 mark: Increments size variable by 1.
0.6 marks: Valid procedure declaration, parameter, and correct conditional structure.

The base case checks if 'n' is less than or equal to 0, returning 0 to stop the recursion. If 'n' is even (n MOD 2 == 0), the function returns 'n' added to the recursive call with 'n - 2'. If 'n' is odd, it returns the result of the recursive call with 'n - 1', as 'n' itself is odd and shouldn't be added to the sum.

1 mark: Correct function signature with parameter n.
1 mark: Correct base case returning 0 when n <= 0.
1.5 marks: Correct recursive step for even values (n + sumEven(n - 2)).
1.5 marks: Correct recursive step/handling for odd values (sumEven(n - 1)).
0.6 marks: Correct recursive structure without infinite loops.

For part (a), checking that parameters are correct types and the data structure exists are key preconditions to avoid crashing before array lookup.
For part (b), the outer 'if' statement validates bounds so that we do not trigger an index out of bounds exception. The inner 'if' checks if the targeted cell contains 0.

Part (a):
1 mark: Stating parameter type checking (e.g. integers).
1 mark: Stating initialization check of the array board.

Part (b):
1 mark: Correct function header and parameter passing.
1 mark: Correct boundary check (row and col between 0 and 7).
1 mark: Correct array lookup checking if value is 0.
0.6 marks: Returning correct booleans on success and failure.

### Pseudocode Design
The algorithm uses **Binary Search** because the data is pre-sorted by `ISBN`.

Key logical elements in the pseudocode:
1. Initialise search boundaries: `low = 0` and `high = libraryBook.length - 1`.
2. Execute a loop while `low <= high` and the item is not yet `found`.
3. Calculate the midpoint: `mid = int((low + high) / 2)`.
4. Compare `libraryBook[mid].ISBN` to `searchISBN`:
- If equal: invert `libraryBook[mid].OnLoan` (using `NOT` or conditional reassignment) and set `found = true`.
- If the midpoint ISBN is greater than target: update `high = mid - 1`.
- If the midpoint ISBN is less than target: update `low = mid + 1`.
5. Output an error if the loop finishes and `found` remains `false`.

### Theoretical Discussion
- **Sorted Array Advantage:** Binary search cannot be performed on unsorted structures; however, since the scenario guarantees the list is pre-sorted by ISBN, binary search is possible and highly recommended.
- **Logarithmic vs Linear Scaling:**
- Linear Search: Time complexity is \(O(n)\). Scaling is linear. If \(n = 1000\), up to 1000 operations are needed.
- Binary Search: Time complexity is \(O(\log_2 n)\). Scaling is logarithmic. If \(n = 1000\), roughly 10 operations are needed. Doubling the dataset size only adds a single constant operation step (\(\log_2(2n) = \log_2(n) + 1\)).

### Level of Response Mark Scheme (9 Marks Max)

#### Level 3 (7–9 marks)
- **Algorithm:** The candidate provides a highly accurate, fully working pseudocode or flowchart of a Binary Search. The boundaries are modified correctly, midpoints are calculated accurately, and the `OnLoan` boolean toggle logic is correctly implemented.
- **Discussion:** A comprehensive and clear comparison is made between Binary Search and Linear Search. Time complexities (e.g. \(O(\log n)\) vs \(O(n)\)) are correctly discussed. The candidate accurately explains scaling behavior (e.g., doubling data size adds only one step to binary search vs doubling steps in linear search).
- **Quality of Written Communication:** Well-structured response using accurate computer science terminology.

#### Level 2 (4–6 marks)
- **Algorithm:** The candidate provides a mostly correct pseudocode or flowchart. It may contain minor logical errors (e.g., off-by-one errors with index boundaries, or failure to cast the midpoint to an integer) or the toggle logic is slightly incomplete.
- **Discussion:** The candidate explains the difference between linear and binary search, but the explanation of efficiency and scaling lacks depth, or mathematical complexity terminology is omitted or slightly confused.

#### Level 1 (1–3 marks)
- **Algorithm:** The candidate attempts a search algorithm (this may be an incomplete Linear Search or a severely flawed Binary Search).
- **Discussion:** Little or no comparison of the two search types. Minimal attempt to explain scaling or efficiency.

### Indicative content to look for:
- Correct initialisation of pointers (`low`, `high`, `found = false`).
- Correct loop condition (`low <= high` and `found == false`).
- Correct midpoint division (`DIV` or `int((low + high)/2)`).
- Correct adjustment of pointers based on comparison (`mid - 1` / `mid + 1`).
- Toggling of boolean flag (e.g., `status = NOT status`).
- Identification of Binary Search as \(O(\log n)\) and Linear Search as \(O(n)\).
- Discussion on scaling performance (e.g. logarithmic growth vs linear growth).