2024 IB DP Computer Science Practice Paper with Answers

Elderly users often experience age-related physical changes such as presbyopia (difficulty focusing on near objects) and reduced motor skills or tremors. 1. Visual issues make small, low-contrast text difficult to read. This is resolved by incorporating settings for dynamic text resizing and high-contrast color schemes. 2. Motor skill issues make precise tapping difficult, resulting in errors. This is resolved by increasing touch target sizes and adding spacing between interactive elements to prevent accidental activations.

[1 mark] For identifying two distinct usability problems faced by elderly users (e.g., small text size, low contrast, precise motor control required, lack of physical feedback). [1.27 marks] For explaining a valid design mitigation that directly addresses one of the identified problems (e.g., resizable fonts for visual clarity, larger button targets for motor dexterity).

At the start of the fetch stage, the address of the next instruction is copied from the Program Counter (PC) to the Memory Address Register (MAR). The MAR acts as a gateway to the address bus; it holds this address and asserts it on the address bus so that the RAM controller can locate the specific memory cell where the instruction is stored.

[1 mark] For stating that the MAR receives or holds the address of the instruction copied from the Program Counter (PC). [1.27 marks] For explaining that the MAR places this address on the address bus to signal/locate the specific memory location in RAM.

A VPN provides security through two primary mechanisms: 1. Encryption: Data is encrypted at the source device using protocols like IPsec or OpenVPN, turning plaintext into ciphertext. If an attacker intercepts the data, it cannot be read without the decryption key. 2. Tunneling: The encrypted packet is encapsulated inside another transit packet. This hides the original packet's header, protecting user anonymity and preventing external entities from inspecting traffic routing details.

[1 mark] For explaining that data is encrypted, rendering it unreadable to anyone who intercepts it. [1.27 marks] For explaining tunneling/encapsulation, which wraps the original packet in another protocol to hide the original source/destination IP address and secure the communication path.

In a linear search, every element may need to be examined if the target is at the end of the list or not present, resulting in a worst-case time complexity of \(O(n)\). In contrast, a binary search repeatedly halves the search space, yielding a worst-case time complexity of \(O(\log n)\). However, binary search relies on finding the midpoint of the search interval and knowing whether the target is larger or smaller than the midpoint value, which is only possible if the data is pre-sorted.

[1 mark] For correctly identifying and contrasting the worst-case time complexities: \(O(n)\) for linear search and \(O(\log n)\) for binary search. [1.27 marks] For stating that the input array/list must be sorted in order for binary search to function correctly.

Array elements are stored in contiguous memory blocks. The operating system calculates the exact physical memory location of `grid[row][col]` directly using the formula: \(\text{Address} = \text{BaseAddress} + (\text{row} \times \text{number\_of\_columns} + \text{col}) \times \text{element\_size}\). Because this calculation requires a constant number of arithmetic operations regardless of the array's size, accessing any element takes \(O(1)\) time.

[1 mark] For stating that the time complexity is \(O(1)\) or constant time. [1.27 marks] For explaining that the address is calculated directly via an offset mathematical formula (no search/traversal is required).

An automated greenhouse relies on negative feedback to maintain stability: 1. A temperature sensor continuously measures the ambient temperature and sends this analog-to-digital converted data to the microprocessor. 2. The microprocessor compares this real-time reading with the preset desired temperature. 3. If the reading is too high, the processor signals actuators (e.g., opening window vents or starting cooling fans) to lower it. If too low, it activates a heater. This continuous loop of measuring, comparing, and correcting maintains a stable environment.

[1 mark] For outlining the continuous collection of input (via temperature sensors) and comparison with a predefined target setpoint. [1.27 marks] For outlining how the processor sends signals to actuators (heaters, fans) to correct any deviation, closing the control loop.

In paging, the operating system divides physical memory (RAM) into fixed-size blocks called 'frames', and logical memory into blocks of the identical size called 'pages'. When a process is executed, its pages are loaded into any available physical frames. The OS maintains a 'Page Table' for each process, mapping the logical pages to their corresponding physical frames. This technique allows a process to be allocated non-contiguously in memory, preventing external fragmentation and facilitating virtual memory.

[1 mark] For explaining that logical memory is split into fixed-size pages and physical RAM is split into equal-sized frames. [1.27 marks] For explaining the role of the page table in mapping pages to frames, allowing non-contiguous allocation and reducing fragmentation.

1. Advantage of interviews: The analyst can ask clarifying questions, explore non-verbal cues, and obtain in-depth, rich qualitative responses that might not be captured in structured question formats. 2. Disadvantage of interviews: They require significant time commitment from both the interviewer and the teachers. This makes it impractical to gather feedback from a large, representative sample of the entire school compared to quick, scaleable online questionnaires.

[1 mark] For stating a valid advantage of interviews over questionnaires (e.g., deeper qualitative detail, opportunity to probe and clarify, interactive nature). [1.27 marks] For stating a valid disadvantage of interviews over questionnaires (e.g., time-consuming to schedule and analyze, labor-intensive, small sample size constraint).

Direct changeover involves completely stopping the old system and immediately starting the new system.

Advantage:
- Lower implementation cost as there is no need to run and maintain two systems simultaneously.
- The transition is immediate, meaning users can benefit from the new features straight away and there is no duplicate data entry.

Disadvantage:
- High risk. If the new system fails or contains critical bugs, there is no fallback system available, which can lead to severe business disruption, downtime, or data loss.

Award up to [2.27 marks] (or 2 marks equivalent if scaled):
- 1 mark for a valid advantage (e.g., less expensive, faster implementation, no duplicate data entry).
- 1 mark for a valid disadvantage (e.g., high risk, no fallback system, stressful transition for staff if problems arise).

During the fetch phase of the machine instruction cycle:
1. The Program Counter (PC) contains the memory address of the next instruction to be fetched.
2. This address is copied from the PC to the Memory Address Register (MAR) via the internal address bus.
3. The MAR then places this address on the external address bus so that main memory (RAM) can locate and read the instruction, while the PC is incremented to point to the subsequent instruction.

Award up to [2.27 marks]:
- 1 mark for stating that the PC holds the address of the next instruction to be executed.
- 1 mark for outlining that this address is copied or transferred to the MAR to initiate the retrieval from main memory (RAM).

In packet switching, data is divided into independent packets, each containing the destination address. If a router or node along the path fails, subsequent packets can be dynamically rerouted along alternative paths by other routers to reach their destination.

In contrast, circuit switching establishes a single, dedicated physical path for the entire duration of the connection. If any node on this dedicated path fails, the entire connection is broken and the communication must be restarted from the beginning.

Award up to [2.27 marks]:
- 1 mark for explaining that packet switching routes packets independently, allowing dynamic rerouting around failed nodes/routers.
- 1 mark for explaining that circuit switching relies on a single dedicated path that becomes entirely unusable if any node on it fails.

(a) A trace table is used to test algorithms for logic errors. It tracks the values of variables step-by-step through successive iterations to ensure the logic achieves the expected outcome before actual coding begins.

(b) Pseudocode solution:
```
SUM = 0.0
COUNT = 0
loop I from 0 to 99
if VOLUMES[I] <= 1.5 then
SUM = SUM + VOLUMES[I]
COUNT = COUNT + 1
end if
end loop
if COUNT > 0 then
AVERAGE = SUM / COUNT
output "Average volume: ", AVERAGE
else
output "No standard packages found."
end if
```

(c) A binary search operates on a sorted array by finding the middle element:
1. Compare the target ID with the middle element's ID.
2. If it matches, the search is complete.
3. If the target is smaller, repeat the search on the left half of the array.
4. If the target is larger, repeat on the right half.
5. Continue halving the search space until the element is found or the subarray size becomes zero.
- Best-case complexity: \( O(1) \), occurring when the target is exactly at the middle of the initial array.
- Worst-case complexity: \( O(\log n) \), which for 1,000 items requires a maximum of approximately 10 comparisons \( (2^{10} = 1024) \).

(d) Modular features include: subprocedures/functions/methods (reusable code blocks), scope parameters (local and global variables preventing unintended data interference), and encapsulation/classes (grouping related data and functions together).

(a) [2 marks]
- 1 mark: For identifying that it is used to track the values of variables during execution / locate logic errors.
- 1 mark: For stating it validates algorithm correctness before implementing it in code.

(b) [5 marks]
- 1 mark: Correct initialization of tracking variables (SUM = 0, COUNT = 0).
- 1 mark: Correct loop structure running through all 100 elements.
- 1 mark: Correct conditional statement to filter package volumes \( \le 1.5 \).
- 1 mark: Correct calculation of average with safe division check (preventing division by zero).
- 1 mark: Correct output statement.

(c) [5 marks]
- 2 marks: Explanation of the divide-and-conquer strategy (identifying middle element, updating low/high pointers based on comparison).
- 1 mark: Detail that the array must be sorted (already stated, but mechanism depends on this preservation).
- 1 mark: Correct best-case complexity \( O(1) \) with explanation.
- 1 mark: Correct worst-case complexity \( O(\log n) \) with explanation.

(d) [3 marks]
- 1 mark per distinct modularity feature identified, up to 3 marks. E.g., functions/subroutines, local variables (variable scope), parameter passing, or class-based structures/modules.

(a) A VPN establishes a secure connection by:
- Tunneling: Encapsulating data packets inside other packets for transport over public networks.
- Encryption: Encoding the payload so that only authorized endpoints with appropriate keys can read it, preventing eavesdropping.
- Authentication: Verifying user identity before granting access to network resources.
- Integrity check: Using hashing or digital signatures to ensure that data is not altered in transit.

(b) Differences:
- Bandwidth utilization: Circuit switching reserves a dedicated physical/logical path, meaning unused bandwidth is wasted. Packet switching dynamically shares bandwidth across multiple users, maximizing resource utilization.
- Data reliability: In circuit switching, the dedicated path guarantees consistent delivery without packet loss, but a physical link failure disrupts the whole connection. In packet switching, routers can redirect packets along different paths if a node fails, ensuring robust overall resilience, though packets may arrive out of order or experience jitter.

(c) TCP/IP Roles:
- TCP: Manages end-to-end data delivery. It divides the file into smaller packets (segmentation), assigns sequence numbers, performs error-checking (parity/checksums), requests retransmission of lost packets, and reassembles them in correct order at the destination.
- IP: Responsible for routing and addressing. It appends source and destination IP addresses to each packet header and guides packets across multiple routers/hops from source to destination.

(d) Speed degradation factors include: physical distance between nodes, high traffic congestion (network overload), electromagnetic interference in media, network hardware bottlenecks (e.g., low-throughput routers), or packet collision rates.

(a) [4 marks]
- 1 mark: Mention of encryption of data payload.
- 1 mark: Mention of tunneling protocols (encapsulation).
- 1 mark: Mention of user/device authentication procedures.
- 1 mark: Mention of maintaining data integrity via encryption/hashing.

(b) [4 marks]
- 2 marks: For comparison of bandwidth utilization (circuit switching wastes unused bandwidth of dedicated line vs packet switching dynamic resource sharing).
- 2 marks: For comparison of reliability (circuit switching has low/no packet loss but physical path failure breaks communication vs packet switching rerouting capability around node failures despite out-of-order delivery risks).

(c) [4 marks]
- 2 marks: TCP role (segmentation, error-checking, sequence numbers, packet reassembly, flow control).
- 2 marks: IP role (source/destination IP addressing, routing packets across network nodes).

(d) [3 marks]
- 1 mark per valid factor identified, up to 3 marks. (e.g., physical distance, physical interference, hardware constraints, network congestion, incorrect routing configurations).

(a) A stack is a Last-In, First-Out (LIFO) data structure where elements are added (pushed) and removed (popped) from the same end (the top). A queue is a First-In, First-Out (FIFO) data structure where elements are inserted at one end (rear/tail) and removed from the opposite end (front/head).

(b) Trace of circular queue (Size 5, indices 0-4):
- Initial: Empty. Head = 0, Tail = 0.
- enqueue(A): Elements = [A, _, _, _, _], Head = 0, Tail = 1.
- enqueue(B): Elements = [A, B, _, _, _], Head = 0, Tail = 2.
- dequeue() (removes A): Elements = [_, B, _, _, _], Head = 1, Tail = 2.
- enqueue(C): Elements = [_, B, C, _, _], Head = 1, Tail = 3.
- enqueue(D): Elements = [_, B, C, D, _], Head = 1, Tail = 4.
- dequeue() (removes B): Elements = [_, _, C, D, _], Head = 2, Tail = 4.
- enqueue(E): Elements = [_, _, C, D, E], Head = 2, Tail = 0 (since index wraps around: \( (4 + 1) \bmod 5 = 0 \)).
- Final State: Head = 2, Tail = 0. Elements in queue: C (at index 2), D (at index 3), E (at index 4).

(c) Binary Search Tree (BST) characteristics:
- Retrieval: A BST keeps elements ordered hierarchically. Starting at the root, the search key is compared to the current node. If smaller, go left; if larger, go right. This eliminates half the search space at each level, leading to an average search time of \( O(\log n) \).
- Dynamic Insertion: To insert, navigate the tree using the same comparison rules until an empty (null) child position is found. Create a new node and link it at this leaf location. No elements need to be shifted, unlike in an array, preserving dynamic and fast efficiency.

(d) Advantages of dynamic data structures:
1. Memory efficiency: They consume memory only as needed, expanding or contracting at runtime.
2. No predefined size limit: Avoids the risk of overflow errors due to fixed array dimensions.
3. Efficient modification: Operations like insertion and deletion do not require shifting all subsequent elements in memory.

(a) [2 marks]
- 1 mark: Correctly defines stack access (LIFO / same-end access).
- 1 mark: Correctly defines queue access (FIFO / opposite-end access).

(b) [5 marks]
- 1 mark: Correct tracking after enqueue(A) and enqueue(B).
- 1 mark: Correct deletion of A shifting Head pointer to index 1.
- 1 mark: Correct addition of C and D shifting Tail pointer to index 4.
- 1 mark: Correct deletion of B shifting Head pointer to index 2.
- 1 mark: Correct final calculation showing Tail pointer wraps around to index 0 after enqueue(E), and correct identification of final stored elements (C, D, E).

(c) [5 marks]
- 1 mark: Mentions hierarchical root-left-right structure.
- 2 marks: Clear description of search comparison rules (smaller goes left, larger goes right) for logarithmic retrieval efficiency.
- 2 marks: Clear description of the insertion process (finding empty child pointer, attaching new leaf node without shifting other data).

(d) [3 marks]
- 1 mark per valid advantage up to 3 marks (e.g., dynamic resizing, memory conservation, faster insert/delete relative to array shift constraints).

(a) Disadvantages of direct changeover:
1. High risk of operational failure: If the new EHR system fails or encounters critical bugs, there is no backup system to fall back on, potentially disrupting crucial healthcare operations.
2. High stress and training demands: Staff must adapt immediately to the new system without a transition period, increasing the likelihood of user error during critical patient care procedures.

(b) User documentation is critical because:
- It provides immediate, accessible assistance to users (doctors, nurses, admin staff) experiencing difficulties, reducing reliance on overstretched IT support teams.
- It standardizes operating procedures for complex data handling (such as prescribing medications), minimizing human error.
- It supports ongoing training of new or rotating staff, ensuring system efficiency is maintained long-term.

(c) Testing comparison:
- Alpha Testing: Conducted internally by software developers and QA teams in a simulated/controlled environment. The objective is to find major bugs, assess basic functionality, and ensure system requirements are met before external release.
- Beta Testing: Conducted externally by real end-users (e.g., hospital staff) in their actual working environment. The objective is to evaluate usability, system performance under real-world loads, and collect feedback on user experience.

(d) Requirements gathering methods: interviews with hospital staff, questionnaires/surveys distributed to administrative users, direct observation of current workflows, or analyzing existing document structures (forms and reports).

(a) [4 marks]
- 1 mark: For identifying disadvantage 1 (e.g., complete reliance, no fallback safety net).
- 1 mark: For describing disadvantage 1 in the context of a hospital (e.g., catastrophic loss of access to patient medical histories).
- 1 mark: For identifying disadvantage 2 (e.g., sudden learning curve / high cognitive load).
- 1 mark: For describing disadvantage 2 in the context of a hospital (e.g., medical staff making critical diagnostic/entry mistakes due to lack of familiarity with the new interface).

(b) [4 marks]
- 1 mark: Emphasizes reducing support/training overhead.
- 1 mark: Mentions improving data entry accuracy / reducing operational error rates.
- 1 mark: Mentions assisting self-paced troubleshooting.
- 1 mark: Links documentation access to uninterrupted healthcare delivery.

(c) [4 marks]
- 2 marks: For describing Alpha testing (performed internally by developers/QA, simulated environment, checking major code bugs).
- 2 marks: For describing Beta testing (performed externally by actual users, live/real-world environment, checking usability and real-world system reliability).

(d) [3 marks]
- 1 mark per valid requirement-gathering method identified, up to 3 marks (e.g., interviews, surveys/questionnaires, observations, document analysis).

(a) Register roles:
- Program Counter (PC): Holds the memory address of the next instruction to be fetched. It increments automatically after the address is copied to the MAR, preparing for the subsequent instruction.
- Memory Address Register (MAR): Holds the address of the current instruction or data to be read from or written to primary memory. During the fetch stage, it receives the address from the PC and places it on the address bus.

(b) Cache memory is a small, extremely high-speed type of volatile memory located directly on or very close to the CPU chip:
- Purpose: It stores frequently used instructions and data that the CPU is likely to access repeatedly.
- Speedup mechanism: Accessing main RAM is relatively slow due to physical distance and bus speeds. Cache operates at or near CPU speeds, allowing the processor to retrieve critical loops or sensor monitoring instructions much faster (reducing CPU idle wait states).

(c) Interrupt handling sequence:
1. The sensor sends an interrupt signal to the CPU.
2. The CPU completes its current machine instruction.
3. The current state (contents of the registers, program counter) is saved to the stack to prevent data loss.
4. The CPU transfers control to the Interrupt Service Routine (ISR) by loading the ISR's address into the PC.
5. The ISR executes instructions to handle the emergency (e.g., turning on all fans, opening vents).
6. Once resolved, the saved state is restored from the stack, and the CPU resumes the suspended program.

(d) Distinctions in this system:
- Volatility: RAM is volatile, losing its data when the greenhouse controller is powered down (used for temporary sensor readings, current state variables). ROM is non-volatile, retaining its data permanently even without power (stores the core operating code / boot firmware).
- Writeability: RAM is read/write, allowing the system to update variables dynamically in real-time. ROM is read-only (or extremely difficult to rewrite in standard operation), preventing accidental modification or corruption of the core operating parameters.

(a) [4 marks]
- 2 marks: Program Counter (holding next instruction address, auto-incrementing).
- 2 marks: Memory Address Register (holding active address, connection to the address bus).

(b) [4 marks]
- 1 mark: Identifies cache as small, high-speed memory located on/near CPU.
- 1 mark: Identifies that cache stores frequently used instructions or data.
- 2 marks: Explains the speed advantage (reduces time spent waiting on slower RAM lookups, eliminating wait states).

(c) [4 marks]
- 1 mark: CPU completes current instruction and detects interrupt.
- 1 mark: Current register states/PC values are saved onto a system stack.
- 1 mark: CPU jumps to the Interrupt Service Routine (ISR) to execute safety protocols.
- 1 mark: CPU restores the saved state from the stack and resumes normal system operation.

(d) [3 marks]
- 1.5 marks: Distinguishes RAM (volatile, read-and-write, stores temporary sensor readings/variables).
- 1.5 marks: Distinguishes ROM (non-volatile, read-only, stores BIOS/firmware/operating program safely).

The robot's wheel encoders fail during wheel slippage because they assume perfect traction, leading to massive odometry errors. An EKF resolves this by running a two-phase process: 1) Prediction phase: The EKF uses high-frequency IMU data (accelerometer and gyroscope) to predict the robot's state (position, velocity, orientation) in short intervals. Although the IMU accumulates drift over time due to double integration of noise, it is unaffected by wheel slippage. 2) Update phase: Lower-frequency visual keypoint data (depth and pixel coordinate matches) from the RGB-D camera are processed. These visual landmarks act as external reference anchors. The EKF calculates the Kalman gain to balance the prediction weight against the measurement noise, correcting the IMU drift and updating the estimated covariance matrix. This sensor fusion loop ensures highly accurate localization even when the wheels are spinning in loose debris.

Award up to 7.5 marks as follows: [2 marks] for identifying and explaining how wheel slippage invalidates wheel-encoder odometry leading to dead-reckoning drift. [2 marks] for explaining the roles of the two sensors: the high-frequency but drifting nature of the IMU and the low-frequency, drift-correcting nature of RGB-D visual feature tracking. [2 marks] for detailing the EKF mechanism (Prediction phase using IMU motion models, Update/Correction phase using visual measurements). [1.5 marks] for explaining how calculating the Kalman gain dynamically balances sensor uncertainties to minimize overall state estimation covariance.

Visual SLAM tracks landmarks across consecutive frames, but errors accumulate over time, distorting the map. Loop closure corrects this when the robot returns to a previously visited area. To detect this in real-time without comparing the current frame to every single historical frame (which scales quadratically as O(N^2)), a Bag-of-Words (BoW) model is used. First, visual features (like ORB) are extracted. These continuous descriptors are mapped to the closest discrete visual words from an offline-trained vocabulary tree. Second, the entire frame is represented as a sparse numerical vector of word frequencies. Third, an inverted index database retrieves past frames containing similar visual words. This reduces the search complexity to O(log N) or near-constant time, enabling resource-constrained processors on rescue robots to identify loop candidates instantaneously and trigger global bundle adjustment.

Award up to 7.5 marks as follows: [2 marks] for explaining visual vocabulary construction (clustering high-dimensional descriptors like ORB into discrete visual words using a hierarchical tree). [2 marks] for describing how a frame is converted into a sparse bag-of-words vector representing word frequencies. [2 marks] for explaining the inverted index mechanism which maps visual words to the historical keyframes containing them. [1.5 marks] for analyzing the computational complexity benefits (reducing O(N^2) pairwise image matching to O(log N) database queries), which is vital for real-time onboard processing under strict resource constraints.

A traditional 3D dense voxel grid maps space uniformly, requiring data allocation for every single coordinate point regardless of whether it contains an obstacle, is empty space, or is unexplored. This scales cubically O(N^3), creating massive files that clog ad-hoc networks during swarm map sharing. An Octree-based map (OctoMap) organizes 3D space hierarchically. The root node represents the entire volume. If a volume is heterogeneous (mix of free space and obstacles), it is subdivided into eight child nodes (octants). If a volume is completely homogenous (e.g., all empty air or all solid wall), the child nodes are pruned, and only the single parent node is stored with that state. This sparse representation drastically reduces the number of data points. For transmission, only the tree updates or active nodes need to be sent, allowing low-bandwidth, lossy wireless networks to successfully sync maps between collaborative robots.

Award up to 7.5 marks as follows: [2 marks] for describing the hierarchical data structure of an octree (recursive eight-way division of 3D spatial volumes). [2 marks] for explaining the pruning mechanism where homogenous child volumes are collapsed into a single parent node. [1.5 marks] for contrasting this with dense voxel grids which allocate fixed memory for every spatial coordinate. [2 marks] for linking the sparse octree representation to network efficiency (smaller payloads, ability to transmit incremental tree updates, reduced packet loss over ad-hoc wireless channels).

When navigating dynamic, unstable environments, path planners must react in milliseconds to falling debris. A* operates on a discretized grid; it is optimal (finds the absolute shortest path) and complete. However, as the state space dimensionality increases (such as incorporating robot orientation, velocity, or multi-joint arm kinematics), the grid size grows exponentially. A* must explore a massive number of graph nodes, which causes unacceptable latencies in dynamic scenarios. Rapidly-exploring Random Trees (RRT) work in continuous space by randomly sampling points and incrementally growing a tree toward unexplored areas. While RRT does not guarantee the absolute shortest path (it is only probabilistically complete and non-optimal without RRT* modifications), it is computationally extremely fast. It can find a valid, collision-free trajectory in high-dimensional spaces within milliseconds. For a rescue robot, finding any safe path immediately to avoid falling debris is far more critical than spending seconds of computation trying to compute the mathematically optimal shortest route.

Award up to 7.5 marks as follows: [2 marks] for evaluating A* (advantages: optimality, completeness; disadvantages: high computational cost on discretized grids, poor scaling in high dimensions). [2 marks] for evaluating RRT (advantages: fast continuous space random sampling, handles high-dimensional kinematics easily; disadvantages: non-optimal solutions, probabilistic completeness). [2 marks] for comparing their behavior in dynamic obstacle environments (A* requires slow regridding/re-search; RRT can quickly re-sample and find a detour). [1.5 marks] for providing a justified recommendation based on the rescue robot's operational priority (valuing speed and safety over absolute mathematical optimality).