Examiner's Perspective: May 2024 SL Paper 1 Analysis
The May 2024 IB Computer Science Standard Level (SL) Paper 1 represented a balanced assessment of core curriculum fundamentals. Clocking in at 90 minutes for a total of 70 marks, the paper maintained its traditional split between the fast-paced theoretical recall of Section A and the algorithmic/problem-solving focus of Section B. While some recall-heavy topics like OSI layers and binary conversions presented straightforward scoring opportunities, the algorithmic questions required high precision in logic and array handling.
Where the Marks Are Distributed
The marks were distributed across the core syllabus domains. Computational thinking led the scoring weight with 30 marks, anchoring the programmatic constructs of the paper through logic gates, loop-based pseudocode, parallel arrays, and sorting comparison. Networks followed with 17 marks, largely driven by a robust 15-mark Section B question focusing on transmission media, packet switching, and VPN implications. System fundamentals contributed 14 marks, assessing students' familiarity with SaaS, pilot running, user documentation, testing, and accessibility issues. Finally, Computer organization made up the remaining 9 marks with questions on memory registers, ALU role, memory types, and binary-to-hexadecimal conversions.
Key Examiner Pitfalls & Common Mistakes
- Algorithm Controls and 'Break' Statements: In Q14(e), examiners noted that many candidates attempted to escape loops using informal or forbidden constructs like break or exit. The IB markscheme explicitly bans these in pseudocode; loops must terminate naturally via boolean flags or structured loop conditions (e.g., while FLAG or while S > 0).
- Parallel Array Desynchronization: A classic trap in Q15(c) was sorting the parallel array ORDER without applying the identical index swaps to the companion array COLOUR. Leaving the parallel arrays un-synced resulted in significant mark deductions.
- MDR vs. MAR Confusion: Candidates frequently struggled to cleanly define the purpose of the Memory Data Register (MDR), often swapping its function with the Memory Address Register (MAR) or confusing it with Cache memory.
- Vague Definitions: Defining basic terms like a "peripheral" or the "NOR" logic operator suffered from a lack of technical accuracy. For instance, defining NOR simply as "the opposite of OR" was rejected; the markscheme demanded a precise truth table or an explicit statement like "outputs one if and only if all inputs are zero".
High-Yield Revision Strategy
To maximize study return on investment (ROI), students should concentrate on mastering packet switching processes and pseudocode structures involving parallel arrays. These are highly recurrent, high-mark items. Additionally, dry-running trace tables is critical for logical evaluation questions (such as Q14(d)), where simple arithmetic or evaluation slips can instantly cost two easy marks. Consistent practice with writing clean, standardized IB pseudocode without shortcut keywords is essential.
Predictions for Upcoming Papers
With SaaS and user acceptance testing heavily featured in this series, future exams are highly likely to rotate back to alternative system installation methods (such as direct or phased changeover) and other software testing phases (such as alpha, beta, or dry-run testing). Data loss prevention and backup strategies are also significantly overdue and should be treated as high-priority areas for revision.