AQA A Level · Computer Science 7517

處理器、暫存器與取指令-執行週期:練習題

5 條多項選擇題即時批改,另有 5 條文字題附完整解題步驟,全部圍繞「處理器、暫存器與取指令-執行週期」。

10 條題目22 免費,無需登記
第 1 題
1

Which component of the processor is responsible for incrementing the address of the next instruction to be fetched after the current fetch cycle has started?

第 2 題
1

Which of the following describes the function of the Status Register within the processor?

第 3 題
1

A computer uses the Harvard architecture. Which of the following is a defining characteristic of this architecture compared to the von Neumann architecture?

第 4 題
1

During the Fetch-Execute cycle, once an instruction has been fetched from memory, where is it stored while it is being decoded by the Control Unit?

第 5 題
1

When an interrupt occurs, the current state of the volatile environment must be saved. Where is this state typically stored before the Interrupt Service Routine (ISR) is executed?

第 6 題
2

Which specific register in the processor is responsible for holding the address of the memory location currently being accessed for data or instructions?

先自己寫一次答案,再對照解題步驟。

第 7 題
3

Describe the role of the Status Register during the execution of a comparison instruction in the processor.

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第 8 題
5

When an interrupt occurs, the processor must save the current state of the registers. Explain the process the processor follows to handle the interrupt and then return to the original task.

先自己寫一次答案,再對照解題步驟。

第 9 題
3

Explain the role of the Control Unit (CU) and the Program Counter (PC) during the fetch stage of the Fetch-Execute cycle.

先自己寫一次答案,再對照解題步驟。

第 10 題
4

A processor's performance is affected by several factors. Explain how (a) Word Length and (b) Data Bus Width specifically influence the speed at which a computer processes data.

先自己寫一次答案,再對照解題步驟。

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